Electron microscopy
Static Random Access Memory (SRAM)
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This book (Practical Electron Microscopy and Database) is a reference for TEM and SEM students, operators, engineers, technicians, managers, and researchers.


Static random-access memory (SRAM or static RAM) is a type of semiconductor memory that uses bistable latching circuitry to store information. A typical DRAM bit cell contains of 4–8 transistors.

Figure 3295 shows a six-transistor CMOS SRAM bit cell. Each bit in an SRAM is stored on the four transistors (M1, M2, M3, and M4) that form two cross-coupled inverters. This storage cell has two stable states (0 and 1). Two additional access transistors (M5 and M6) control the access to the storage cell during read and write operations.

A six-transistor CMOS SRAM bit cell       A six-transistor CMOS SRAM bit cell

Figure 3295. A six-transistor CMOS SRAM bit cell: (a) Layout [1]; (b) Schematic illustration.






[1] Alex A. Volinsky, Larry Rice, Wentao Qin, and N. David Theodore, FIB failure analysis of memory arrays, Microelectronic Engineering 75 (2004) 3–11.




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