Chapter/Index: Introduction | A |
B |
C |
D |
E |
F |
G |
H |
I |
J |
K |
L |
M |
N |
O |
P |
Q |
R |
S |
T |
U |
V |
W |
X |
Y |
Z |
Appendix
Electrical Overstress (EOS) Failure Mechanisms
| Table 1297 lists electrical overstress (EOS) in multi-gate technologies and FinFET (Fin Field Effect Transistor) devices. FinFET structures is used to replace standard planar MOSFETs in advanced CMOS technology nodes.
| Table 1297. EOS in multi-gate technologies and FinFET devices. |
| FinFET type |
Technology (nm) |
Test polarity |
Pin pair (stress/reference) |
Failure mechanism |
Reference |
| MOSFET |
65 |
Positive |
Drain-to-source |
FinFET drain molten silicon |
[1] |
| 45 |
[1] |
| 32 |
[1] |
| Diode configured FinFET |
65 |
Positive |
Drain-to-source |
FinFET fin region |
[1] |
| 45 |
[1] |
| 32 |
[1] |
| FinFET P-N gated diode |
|
Positive |
Anode-to-cathode |
P+/N+ fin region uniform conduction |
[1] |
EOS (Electrical Overstress) failure mechanisms in CMOS technology can occur in all active and passive elements [1]:
i) N-channel MOSFET,
ii) P-channel MOSFET,
iii) N-doped diffused resistors,
iv) P-doped diffused resistors,
v) Silicided polysilicon resistors,
vi) Non-silicide polysilicon resistors,
vii) Metal-oxide-metal capacitors,
viii) Metal-insulator-metal capacitor,
ix) Decoupling capacitors,
x) Vertical natural plate (VNP) capacitors.
[1] Steven H. Voldman, Electrical Overstress (EOS): Devices, Circuits and Systems, 2013.
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