This book (Practical Electron Microscopy and Database) is a reference for TEM and SEM students, operators, engineers, technicians, managers, and researchers.
 

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In integrated circuits (ICs), conductive lines provide electrical interconnection among different parts of the ICs, devices, and the outside. The main applications of metallization are classified by gate, contact, and interconnection. Polysilicon and silicides are commonly applied as gates and interconnects in MOS devices. Aluminum, copper, tungsten, silver, titanium, platinum, gold, and palladium are used as these types of contacts, connections, and/or interconnection to external components.

Table 2031. Metallization selections in ICs.

Figure 2031 shows several chemical reactions occurring during annealing of a transistor structure coated with Ti to form a low resistive TiSi₂ layer at the source, gate, and drain. When silicon and titanium are reacted, Ti and Si can diffuse laterally over the isolation regions and form thin filaments of TiSi_x that can electronically connect a gate electrode and source/drain regions and can cause failure of the device. This phenomenon is called "bridging". On the other hand, those by-products (TiSi_x, TiO_x, and TiN) form over the isolation regions and cannot easily be etched in conventional salicide etching solutions. The use of a nitrogen atmosphere during thermal annealing is essential in preventing this failure mechanism [1] because nitrogen quickly diffuses into the grain boundaries and significantly suppresses any long-range silicon diffusion in the titanium layer. Furthermore, to avoid the by-product formation, the annealing temperature cannot be too high.

Figure 2031. Several chemical reactions occurring during annealing of a transistor structure coated with Ti to form a low resistive SiTi2 layer.

[1] C. K. Lau, “Method of Forming Titanium Disilicide,” U.S. Patent 4,545,116, 1985.