In general, copper has high electromigration endurance. However, Cu electromigration, e.g. in dual-damascene interconnects, is still one of the most important reliability problems in microelectronic devices.  Evidences show that the Cu/Si3N4 cap interface is the dominant electromigration path, [3,4] the other paths are grain boundary diffusion [5,6], coupling between grain boundary and interface diffusion , and Cu/liner interface [8,9].
The grains in Cu interconnects in ICs normally span the entire linewidth at linewidths of less than 2 µm (called bamboolike microstructure). In this case, Cu in electromigration (EM) processes migrates at the interface between Cu and the dielectric diffusion barrier because these grains act as blocking grains. However, no blocking grain exists in the linewidths of 4–6 µm (the Cu microstructure is in polycrystalline phase). In this case, Grain boundary and/or interface diffusion can occur in the EM process. SIM images in Figure 2907 show the microstructures of the Cu interconnects with Ta liner: (a) Cu linewidth of 0.8 µm (bamboolike microstructure), and (b) Cu linewidth of 6 µm (polycrystalline).
Figure 2907. SIM images of the Cu interconnects with Ta liner: (a) Cu linewidth of 0.8 µm (bamboolike microstructure), and (b) Cu linewidth of 6 µm (polycrystalline).
Adapted from 
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