Electron microscopy
 
SOD (Spin On Dielectrics)
- Integrated Circuits and Materials -
- An Online Book -
Integrated Circuits and Materials                                                                                  http://www.globalsino.com/ICsAndMaterials/        


Chapter/Index: Introduction | A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z | Appendix

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Figure 2259a. BEOL (copper interconnect layers) and FEOL (transistor level). In the IC (integrated circuits) process, transistors are manufactured on a wafer in a fab, where the front-end-of-the-line (FEOL) is. And then, the interconnects and MOL (middle-of-line) layers are produced in a separate fab facility called the backend-of-the-line (BEOL). The transistor structure and interconnects are the MOL, which consists of a series of tiny contact structures.

BEOL and FEOL

Figure 2259a. BEOL and FEOL. [1]

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[1] https://semiengineering.com/breaking-the-2nm-barrier/.

         
         
         
         
         
         
         
         
         
         
         
         
         
         
         
         
         
         

 

 

 

 

 

 

 

 

 

 

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