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Figure 2260a. BEOL (copper interconnect layers) and FEOL (transistor level). In the IC (integrated circuits) process, transistors are manufactured on a wafer in a fab, where the front-end-of-the-line (FEOL) is. And then, the interconnects and MOL (middle-of-line) layers are produced in a separate fab facility called the backend-of-the-line (BEOL). The transistor structure and interconnects are the MOL, which consists of a series of tiny contact structures.

Figure 2260a. BEOL and FEOL. [1]

Figure 2260b shows the etch processes in a CMOS IC chip.

Figure 2260b. Etch processes in a CMOS IC chip. [2]

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[1] https://semiengineering.com/breaking-the-2nm-barrier/.         
[2] Hong Xiao, Introduction to semiconductor manufacturing technology, 2012.