Short between gate and source contacts in FinFET

Short between Gate and Source Contacts in FinFET
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Figure 3829a shows electrical shorts between gate and source contacts in advanced FinFET technology.

Advanced semiconductor technology

Figure 3829. Advanced semiconductor technology. (a) Evolution of complementary metal−oxide−semiconductor (CMOS) transistor from the planar structure to the non-planar structure comprising Fin field-effect transistors (FinFET) and gate-all-around field-effect transistors (GAA-FET). (b)(i) ICs consisting of various circuits that are made of FinFETs (ii). FinFET is a tri-gate structure as shown by its cross-sectional view along the width (iii) and the source-channel-drain (iv) direction. The STEM image in panel (v) shows the existence of a bridge defect connecting the gate contact to the source contact. [1]

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[1] Jieming Pan, Kain Lu Low, Joydeep Ghosh, Senthilnath Jayavelu, Md Meftahul Ferdaus, Shang Yi Lim, Evgeny Zamburg, Yida Li, Baoshan Tang, Xinghua Wang, Jin Feng Leong, Savitha Ramasamy, Tonio Buonassisi, Chen-Khong Tham, and Aaron Voon-Yew Thean, Transfer Learning-Based Artificial Intelligence-Integrated Physical Modeling to Enable Failure Analysis for 3 Nanometer and Smaller Silicon-Based CMOS Transistors, ACS Appl. Nano Mater., 4, 6903−6915, https://doi.org/10.1021/acsanm.1c00960, 2021.

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