Electron microscopy
  
MESH (Mechanically Enhanced Storage node for virtually unlimited Height)
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Chapter/Index: Introduction | A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z | Appendix

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At IEDM 2004 Samsung announced their MESH capacitor structure [2] as shown in Figure 4661. In this structure, a nitride layer is added near the top of the mould dielectric stack. After removal of the mould oxide layers this remains as a support layer locking the individual storage
cylinders in place, eliminating the variable spacing.

MESH Capacitor Spacers and RCATs in Samsung 58-nm 2 Gb SDRAM

Figure 4661. MESH Capacitor Spacers and RCATs in Samsung 58-nm 2 Gb SDRAM. [1]

 

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[1] Dick James, Recent Innovations in DRAM Manufacturing, 2010 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC), DOI:10.1109/ASMC.2010.5551462, 2010.
[2] Kim, D.H., et al., “A Mechanically Enhanced Storage node for virtually unlimited Height (MESH) Capacitor Aiming at sub 70nm DRAMs”, 2004 IEDM Technical Digest, pp. 69 – 72.

 

 
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