Backside analysis with photon emission technique takes advantage of the fact that silicon is fairly transparent to near infrared (NIR) light and, in general, the back surface can be prepared in a repeatable manner with a high quality finish without topography features.

Backside and frontside PEM should be selected by considering:
         i) considering the possible level of the defect in the wafer,
         i) Understanding of the device structure and layers.

For instance, Figure 4867a shows PEM mapping depending on the local levels of the defects in the wafer. For this vertical MOSFET structure, some defects are analyzed by using frontside PEM (since the defect locates at the top side of the wafer), while some by backside PEM (since the defect locates at the bottom side of the wafer). The electrically conductive layers in the gates, and drain and source contacts are TiN/Ti(TiSix) metal layers. Figure 4867a shows an example of backside PEM results, which cannot be obtained from frontside PEM.

Figure 4867a. PEM mapping depending on the local levels of the defects in the wafer. [1]

Figure 4867b. PEM Emission at the back of a structure shown in Figure 4867a. [1]

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[1] Abul Khair Yahya, Nik Tajuddin Yusof, and Yusnani Mohamad Yusof, Noble Failure Analysis Procedure for Trench MOSFET Technology Devices Through Detail Electrical Parameter Characterization and Unique Fault Isolation Technique, 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, DOI: 10.1109/IPFA.2012.6306269, (2012).