Electron microscopy
 
Bit Line Contact (BLC) in DRAM
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In DRAM, bitline contacts and digit contacts often refer to the same thing. The terms can be used interchangeably, depending on the context and the specific naming conventions of different manufacturers or design documents. The terminology can vary because of historical reasons, design preferences, or specific conventions adopted by different companies or publications. However, the fundamental function they describe remains the same: connecting the bitlines to the memory cells in the DRAM array.

Figure 2375a shows DRAM 8F2 cell structure:
        S/A -- Sense amplifier.
        WL -- Word-line.
        BL -- Bit-line.
        BLC -- Bit line contact.
        SNC -- Storage node contact.
        Cap -- Capacitor.

DRAM cell structure

Figure 2375a. DRAM 8F2 cell structure. [1]

Figure 2375b shows the three main leakages in DRAM cells.

Leakages in DRAM cells: (b) GIDL in Cell Transistor, (c) Dielectric leakage between BLC and SNC, (d) Dielectric leakage at DRAM Capacitor

Figure 2375b. Leakages in DRAM cells: (b) GIDL in Cell Transistor, (c) Dielectric leakage between BLC and SNC, (d) Dielectric leakage at DRAM Capacitor. [2]

Cell Layout of a Samsung DRAM using the buried wordline (bWL)

Figure 2375c. Cell Layout of a Samsung DRAM using the buried wordline (bWL). Adapted from [3]

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[1] https://blog.naver.com/minky0118/221860772321.
[2] https://semiengineering.com/identifying-dram-failures-caused-by-leakage-current-and-parasitic-capacitance/.
[3] https://archive.eetasia.com/www.eetasia.com/ART_8800697748_499486_TA_0f9c7f01_2.HTM.

 

 

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