Chapter/Index: Introduction | A |
B |
C |
D |
E |
F |
G |
H |
I |
J |
K |
L |
M |
N |
O |
P |
Q |
R |
S |
T |
U |
V |
W |
X |
Y |
Z |
Appendix
Diagrams and Pin/Pad Connections of NAND
| Figure 4883 shows a dual plane device of a NAND chip:
- Wordline decoder -- Is in the middle of the
two planes (in some devices there could be one row decoder per plane).
- Column decoder (bitline decoder) -- Is at
the bottom.
- Wordlines -- Is in the horizontal direction.
- Bitlines -- Is in the vertical
direction.
- Block -- Is made up by a group of wordlines (typically 32 or
64).
Figure 4883. Dual plane device of a NAND chip. [1]
[1] Rino Micheloni, Luca Crippa, and Alessia Marelli, Inside NAND Flash Memories, 2010.
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