This book (Practical Electron Microscopy and Database) is a reference for TEM and SEM students, operators, engineers, technicians, managers, and researchers.
 

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In many cases, the deep level states in semiconductors can be analyzed by EELS measurements. For instance, the pronounced shoulder below 100 eV indicated by the arrow in Figure 2804 presents a deep level state, above Fermi level in band gap, produced by symmetric segment a 5-fold coordinated atom in CSL junction in polycrystalline silicon. The shoulder in the Si-L_2,3 ELNES was detected only from the symmetric segment of the {112} Σ3 CSL boundary near the CSL junction, but not from the bulk, {112} and {111} Σ3 CSL boundaries. The CSL junction would be electrically active and affects the electrical conductivity in polycrystalline silicon.

[1] Norihito Sakaguchi, Makito Miyake, Seiichi Watanabe, and Heishichiro Takahashi, EELS and Ab-Initio Study of Faceted CSL Boundary in Silicon, Materials Transactions, 52(3) (2011) 276.