This book (Practical Electron Microscopy and Database) is a reference for TEM and SEM students, operators, engineers, technicians, managers, and researchers.
 

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In the interconnects of ICs, three distinct trends are induced due to scaling:

        i) Driven by Moore’s law, the widths of metal interconnects decrease exponentially. As a result, the overall cross-sectional area of interconnect is reduced.
        ii) With increasing integration of functionality and passive devices the total interconnect length is exploding as well so that there are more wires on a die.
        iii) Currents are not scaling proportionally to shrinkage of wire widths and thus, the current densities in modern ICs are extremely high.

Figure 2892 shows the width scaling of interconnects and the current density scaling in ICs.

Figure 2892. The width scaling of interconnects (a) and the current density scaling (b).