Practical Electron Microscopy and Database

An Online Book, Second Edition by Dr. Yougui Liao (2006)

Practical Electron Microscopy and Database - An Online Book

Chapter/Index: Introduction | A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z | Appendix

Passive Voltage Contrast (PVC) in FIB and SEM

Passive voltage contrast (PVC) method for failure localization on semiconductor circuits  is based on contrast differences in FIB or SEM images of more or less electrically conducting structures in the circuits [1–7]. The term "passive" refers to the fact that this technique does not require the application of an external electrical signal or bias to the circuit under investigation. Instead, the PVC method relies on the natural voltage differences present in the circuit, often caused by residual or floating charges, to create contrast in the images taken with a FIB or SEM. Therefore, failure localization with PVC is based on the fact that the floating conductive structure is charged up under the irradiation of the primary beam in FIB and SEM.

After removing metal 1, the darker contrast in PVC (Passive Voltage Contrast) in Figure 3863 (a) presented at several P+Nwell active contacts. Such spots are verified to be high resistance due to missing contrast as shown in the AFP (AFP (Atomic Force Probing) current imaging in Figure 3863 (b). Figure 3863 (c) shows that the cross-sectional STEM image along BB’ in Figure 3863 (a) indicated that the contact is marginally landed (arrowed in red), where there was insufficient tungsten filling into the silicide contact.

Passive Voltage Contrast (PVC) in Semiconductor PFA Passive Voltage Contrast (PVC) in Semiconductor PFA Passive Voltage Contrast (PVC) in Semiconductor PFA
(a)
(b)
(c)
Figure 3863. (a) PVC image, (b) AFP curve, (c) FIB image. [8]

 


 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[1] J. Colvin, in Proceedings of the 16th International Symposium on Testing and Failure Analysis. A new technique to rapidly identify low level gate oxide leakage in field effect semiconductors using a scanning electron microscope, vol 331 (1990)
[2] N. Nishikawa, N. Kato, Y. Kohno, N. Miura, N. Shimizu, in ISTFA 1999 Proceedings. An application of passive voltage contrast (PVC) to failure analysis of CMOS LSI using secondary electron collection (1999), pp. 239–243
[3] C. Yuan, S. Li, A, ISTFA 2005 Proceedings. Gray method of failure site isolation for flash memory device using FIB passive voltage contrast techniques (2005), pp. 202–205
[4] C.M. Shen, S.C. Lin, C.M. Huang, H.X. Lin, C.H. Wang, ISTFA 2005 Proceedings. Couple passive voltage contrast with scanning probe microscope to identify invisible implant issue (2005), pp. 212–216
[5] T. Sakai, N. Oda, T. Yokoyama, in IEEE International Symposium 1999. Defect isolation and characterization in contact arraychain structures by using voltage contrast effect (1999)
[6] J. C. Lee, C. H. Chen, D. Su, J.H. Chuang, in ESREF 2002. Investigation of sensitivity improvement on passive voltage contrast for defect isolation (2002)
[7] R. Rosenkranz, in 8th European FIB User Group Meeting 2004. FIB voltage contrast for failure localization on CMOS circuits - an overview (2004)
[8] A. C. T. Quah, G. B. Ang, D. Nagalingam, C. Q. Chen, H. P. Ng, S.P. Neo, J. Lam, Z.H. Mai, Failure Analysis Methodology on Resistive Open Defects, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, November 9–13, 2014, Houston, Texas, USA.