Chapter/Index: Introduction | A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z | Appendix
Passive voltage contrast (PVC) method for failure localization on semiconductor circuits is based on contrast differences in FIB or SEM images of more or less electrically conducting structures in the circuits [1–7]. The term "passive" refers to the fact that this technique does not require the application of an external electrical signal or bias to the circuit under investigation. Instead, the PVC method relies on the natural voltage differences present in the circuit, often caused by residual or floating charges, to create contrast in the images taken with a FIB or SEM. Therefore, failure localization with PVC is based on the fact that the floating conductive structure is charged up under the irradiation of the primary beam in FIB and SEM. After removing metal 1, the darker contrast in PVC (Passive Voltage Contrast) in Figure 3863 (a) presented at several P+Nwell active contacts. Such spots are verified to be high resistance due to missing contrast as shown in the AFP (AFP (Atomic Force Probing) current imaging in Figure 3863 (b). Figure 3863 (c) shows that the cross-sectional STEM image along BB’ in Figure 3863 (a) indicated that the contact is marginally landed (arrowed in red), where there was insufficient tungsten filling into the silicide contact.
[1] J. Colvin, in Proceedings of the 16th International Symposium on
Testing and Failure Analysis. A new technique to rapidly identify
low level gate oxide leakage in field effect semiconductors using
a scanning electron microscope, vol 331 (1990)
|