Python Automation and Machine Learning for EM and ICs

MOS technology uses Field Effect from the gate biasing voltage to gather the corresponding majority carriers to either enhance or deplete the channel under the gate oxide, and thus it is called MOSFET devices. In this way, the MOSFET enable the majority carrier to flow through the channel, horizontally from Source to Drain.

The operation of MOSFETs can intuitively be explained with the simple relationship of Q = C·V. When a small + signal is applied to one N-MOSFET gate, the N-MOSFET flows + charge from drain to source (in reality, electron is flowing from source to drain). And then the charges are being piled up at the source node, because the bottom N-MOSFET is a current source that flows the constant current while changing the drain–source voltage. For instance, MOSFET device of longer than 1 μm channel length allows that dI_DS/dV_DS is approximately zero at the saturation mode.

There are different ways to represent MOSFET components as listed in Table 4985. When we’re analyzing or designing CMOS circuits, we normally think of MOSFETs as voltage-controlled on/off switches, without any specific reference to source and drain terminals. Therefore, the only difference between an NMOS and a PMOS is that the PMOS is activated by a logic-low voltage and the NMOS is activated by a logic-high voltage.

Table 4985. MOS field-effect transistors.

Name	Symbol		Name	Symbol
NMOS field-effect transistor			PMOS field-effect transistor

Figure 4985 shows cross section and circuit symbol for the four-terminal N-MOSFET.

(a)                                                                                                  (b)

Figure 4985. (a) Cross section, and (b) Circuit symbol for the four-terminal N-MOSFET. [2]

In Figure 4985, characteristic parameters are:
          i_D -- Drain current,
          i_S -- Source current,
          i_G -- Gate current,
          i_B -- Body current,
          v_GS -- Gate-source voltage (= v_G - v_S),
          v_DS -- Drain-source voltage (= v_D - v_S),
          v_SB -- Source-bulk voltage (= v_S - v_B).

These voltages above are all positive during normal operation of the N-MOSFET.

[1] Krzysztof (Kris) Iniewski, CMOS Processors and Memories, 2010.
[2] Richard C. Jaeger and Travis N. Blalock, Microelectronic Circuit Design, 2011.