Failure due to Cobalt Silicide Stringers and Spikes - Practical Electron Microscopy and Database - - An Online Book - |
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Microanalysis | EM Book https://www.globalsino.com/EM/ | ||||||||
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Cobalt silicide stringer, causing gate to drain leakage, had been observed in MOS structures as shown in Figure 1292a. Figure 1292a. Cobalt silicide stringer causing gate to drain leakage [1]. Abnormal CoSix spikes under cobalt silicide film were also found in IC devices (e.g. Figure 1292b). Such spikes and Si/silicide interface roughness and thus various defects can cause unacceptable high junction leakage (junction shorting) because the spikes encroach on the junction edge when the silicide thickness becomes larger [3, 4]. In this case, the consumed silicon depth gets too large so that the silicide-silicon interface gets too close to the p-n junction. Goto et al. proposed that the leakage was driven by an area effect as opposed to perimeter effects [5, 6]. They stated that the leakage occurred at the phase transition temperature from Co2Si to CoSi as a results of CoSi spikes through the metallurgical junction. The stress-induced Co2Si/CoSi/Si triple points, leading to area spiking, result in significant junction leakage in ultra-shallow junctions. In fact, this leakage is caused by junction depletion region encroachment upon the silicide-silicon interface. On such failing samples, it was observed by AFM measurements that the surfaces of p+ diffusion areas were smoother than the n+ diffusion areas after the cobalt silicides had been removed with dilute HF [3]. Figure 1292b. Abnormal cobalt silicide spike [2]. Note that, for ultra-shallow contact areas, it is critical to form smooth, conformal cobalt disilicide (CoSi2) without facets or voids for microelectronic device reliability. [8] On the other hand, to maintain the junction leakage within the tolerable range, the silicon consumption depth is limited to half of the source/drain contact junction depth. [7]
[1] ISTFA 2009: Conference Proceedings from the 35th International Symposium for Testing and Failure Analysis.
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