Polycrystalline Silicon
- Practical Electron Microscopy and Database -
- An Online Book -

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This book (Practical Electron Microscopy and Database) is a reference for TEM and SEM students, operators, engineers, technicians, managers, and researchers.
 

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In integrated circuits (ICs), conductive lines provide electrical interconnection among different parts of the ICs, devices, and the outside. The main applications of metallization are classified by gate, contact, and interconnection. Polysilicon and silicides are commonly applied as gates and interconnects in MOS devices.

Table 2051a shows the summary of 2003 Roadmap, listing the node, gate length, equivalent oxide thickness of high power (CPU) and low standby power devices (mobile), gate oxide material, and gate electrode material.

Table 2051a. Summary of 2003 Roadmap.

Year
2001
2003
2005
2007
2009
2012
2016
2018
Node
130
100
80
65
45
32
22
18
ASIC 1/2 pitch
150
107
80
65
45
32
25
18
Physical gate
length
65
45
32
25
20
13
9
7
Tox hi power
1.5
1.3
1.1
0.9
0.8
0.6
0.5
0.5
Tox lo power
2.2
2.1
1.6
1.4
1.1
1.0
0.9
Gate oxide
Oxynitride
HfOx; Si,N
LaAlO3
Gate metal
Poly Si
Metal gate, e.g. TaSiNx

Table 2051b. Metallization selections in ICs.

Application
Selection
Gates, interconnection, and
contacts
Polysilicon, refractory metal silicides (e.g. MoSix, TaSix, WSix, and TiSix), nitrides,aluminum, copper, and/or refractory metals.
Diffusion barrier layer
Ti, TiN, Ta, TaN, Ti-W alloy, and/or silicides
Top level
Aluminum, and/or copper
Metallization on silicon
Silicides, tungsten, aluminum, and/or copper

Table 2051c. Comparison between coarse- and fine-grain polycrystalline Si.

Coarse-grain poly-Si
Fine-grain poly-Si

Deposition temperature

~640 °C

~580 °C
Surface roughness
> 5 nm
<1.5 nm

Grain size

Undoped

16-32 nm

Very small

In situ P-doped

24-40 nm

Strain
-0.007 (compressive)
-0.007 (compressive)
Effect of thermal annealing
Grain size increases; residual strain decreases but remain compressive
Grain size increases to 10-90 nm; compressive to tensile strain
Dry and wet etch rate
Higher for doped Si
Higher for doped Si

Texture

<110> as deposited; <311> in situ P-doped

No texture

Note that the comparison of the properties between single, polycrystalline, and amorphous Si is listed in page2019.

 

 

 

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