Depending on specific processing conditions, various failures related to cobalt silicides can exist in IC devices, resulting in significant leakage (or short) or open:
i) Failure of cobalt silicidation.
ii) Void-formation-induced failure in cobalt silicidation.
iii) Failure due to cobalt silicide stringers and spikes.
iv) Titanium silicides, in general, induce higher compressive strain than cobalt silicides . The induced strain can be a source for dislocation nucleation in silicon if the silicidations are carried out at high temperatures .
v) Cobalt segregates at wafer surface, but such surface segregation is negligible after a fast ramp-down (RTA). 
vi) Cobalt is left in bulk after a treatment with a slow furnace ramp-down. 
vii) Cobalt segregates and precipitates at oxide-silicon interface after thermal treatment. 
viii) Cobalt segregates and precipitates at defects (e.g. dislocations) in bulk. 
ix) Co diffused through 4, 10, 100 nm SiO2 into Si bulk. However, the Co contamination did not affect oxide tunneling voltages. 
x) High concentration of Co on Si substrate, before oxide growth, degraded both oxide and substrate properties [5,6], resulting in excess leakage.
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