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The main reason of using silicon dioxide (SiO₂) as dielectrics in conventional ICs is that microelectronics technology uses silicon (Si) as substrates. But SiO₂ normally is not used in other semiconductor integrated chips. In Si technologies, SiO₂ can be made from Si by thermal oxidation, while other semiconductors (Ge, GaAs, GaN, SiC. ..) have poor native oxides. Amorphous SiO₂ has very few electronic defects and forms an excellent interface with Si. It is easy to etch and pattern SiO₂ films to a nanometer scale. The main problem with SiO₂ is that electrons and holes can easily tunnel across the SiO₂ film if it is too thin (e.g. 1.4 nm for 45 nm node). Table 2075a lists the properties of amorphous SiO₂.

Table 2075a. General properties of amorphous silicon dioxide (SiO₂).

Table 2075b. Properties and deposition of different silicon dioxides.

Table 2075c. Chemical reactions used in CVD for SiO₂ film growth.

                                 * ACVD: Subatmospheric CVD.

Figure 2075a shows several chemical reactions occurring during annealing of a transistor structure coated with Ti to form a low resistive TiSi₂ layer at the source, gate, and drain. When silicon and titanium are reacted, Ti and Si can diffuse laterally over the isolation regions and form thin filaments of TiSi_x that can electronically connect a gate electrode and source/drain regions and can cause failure of the device. This phenomenon is called "bridging". On the other hand, those by-products (TiSi_x, TiO_x, and TiN) form over the isolation regions and cannot easily be etched in conventional salicide etching solutions. The use of a nitrogen atmosphere during thermal annealing is essential in preventing this failure mechanism [1] because nitrogen quickly diffuses into the grain boundaries and significantly suppresses any long-range silicon diffusion in the titanium layer. Furthermore, to avoid the by-product formation, the annealing temperature cannot be too high.

Figure 2075a. Several chemical reactions occurring during annealing of a transistor structure coated with Ti to form a low resistive SiTi₂ layer.

Figure 2075b shows the dry and wet growth rates on <111> and <100> crystalline silicon (Si) substrates at different elevated temperatures. Two important properties are clearly presented here:
         i) The oxidation rates increase with temperature.
         ii) The wet oxidation rates are much faster than those in dry oxidation.

Figure 2075b. Dry and wet growth rates on <111> and <100> crystalline Si substrates.

Table 2075d. Etchants used in semiconductor manufacturing.

Table 2075e. Etching selectivity of Si₃N₄:SiO₂:Si in various solutions.

Table 2075f. Etching rate of SiO₂ in various solutions.

Si is easily oxidized in air during mechanical polishing for EM analysis. In some critical analyses (e.g. Si surface plasmon analysis) in EELS, Si TEM specimens are normally dipped in HF solution (e.g. 10% HF solution) to remove the surface oxide. However, a thin layer of SiO_x may still exist due to exposure to air before loading into the TEM.

SiO₂ can be in both amorphous and crystalline phases. Table 2075g lists the different forms of SiO₂.

Table 2075g. Different forms of SiO₂.

Table 2075h. Color chart for SiO₂ films observed perpendicularly under daylight fluorescent lighting.

Note that substantial local atomic order is still present in fully amorphous silica glass: Each silicon (Si) atom is tetrahedrally surrounded by four oxygen (O) atoms at 1.62 Å, and the oxygen–oxygen separation is typically 2.65 Å. This phenomenon is call short-range ordering.

[1] C. K. Lau, “Method of Forming Titanium Disilicide,” U.S. Patent 4,545,116, 1985.